Cost-effective implementation of ITU-T G.723.1 on a DSP chip
Sangmin Lee, Sangil Park, Yonngbeom Jang
Abstract
Sangmin Lee, Sangil Park, Yonngbeom Jang
Abstract
This paper presents a full-duplex, real-time implementation of ITU-T G.723.1 speech coder using the SSP1820, Samsung's DSP chip which is based on a 16-bit fixed-point Oak core. Optimization methods are proposed in order to reduce the total cycle time consumed in real-time implementation. The multi-pulse maximum likelihood quantization (MP-MLQ) excitation search block which is the most computation-intensive block in the coder is restructured to reduce the algorithmic redundancy. In addition, efficient filtering methods and memory management are utilized for further optimization. The bit-exact verification with the ITU test vectors and performance evaluation aspects are also discussed in this paper.
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This paper presents a full-duplex, real-time implementation of ITU-T G.723.1 speech coder using the SSP1820, Samsung's DSP chip which is based on a 16-bit fixed-point Oak core. Optimization methods are proposed in order to reduce the total cycle time consumed in real-time implementation. The multi-pulse maximum likelihood quantization (MP-MLQ) excitation search block which is the most computation-intensive block in the coder is restructured to reduce the algorithmic redundancy. In addition, efficient filtering methods and memory management are utilized for further optimization. The bit-exact verification with the ITU test vectors and performance evaluation aspects are also discussed in this paper.
Key concepts: Computer science, Digital signal processing, Redundancy (engineering), Quantization (signal processing), Block (permutation group theory), Embedded system, Computer hardware, Parallel computing