RTL-level modeling of an 8B/10B encoder-decoder using SystemC
Ibrahim Aref, Nadeem Ahmed, Fernando Rodríguez-Salazar, K. Elgaid
Abstract
Ibrahim Aref, Nadeem Ahmed, Fernando Rodríguez-Salazar, K. Elgaid
Abstract
This paper presents an RTL-level model of an 8B/10B encoder/decoder block in SystemC. The use of 8B/10B coding is an important technique in the construction of high performance serial interfaces. These are particularly suitable for alleviating the I/O bottleneck of state of the art systems which are pinout, rather than bandwidth limited). SystemC has been chosen because it provides a homogeneous design flow for complex designs (i.e. SoC and IP based design), where system modeling at the early stages of the design becomes increasingly important.
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This paper presents an RTL-level model of an 8B/10B encoder/decoder block in SystemC. The use of 8B/10B coding is an important technique in the construction of high performance serial interfaces. These are particularly suitable for alleviating the I/O bottleneck of state of the art systems which are pinout, rather than bandwidth limited). SystemC has been chosen because it provides a homogeneous design flow for complex designs (i.e. SoC and IP based design), where system modeling at the early stages of the design becomes increasingly important.
Key concepts: SystemC, Computer science, Bottleneck, Encoder, Design flow, Electronic system-level design and verification, High-level synthesis, Computer architecture