2006Unpublished venueRequires access

A Fully Integrated CMOS LC VCO and Frequency Divider for UHF RFID Reader

Sangyoon Jeon, Sung-Jae Jung, Dong-Hyun Lee, Heung-Bae Lee

Open publisher page 12 citations

Abstract

This paper presents a 0.18-mum CMOS fully integrated LC VCO, suitable for radio frequency identification (RFID) reader working at 900 MHz. The VCO comprises cross-coupled double core and PMOS tail current source to suppress 1/f noise up conversion. To minimize pulling, the 900 MHz VCO is generated by a 1.8GHz VCO followed by a frequency divider. In addition, current source of this topology was applied bandgap reference to reduce effect of temperature and supply voltage variation, which is caused by unstable oscillation state. The measured result of phase noise is demonstrated with -106 dBc/Hz at 100 kHz offset. The power consumption of the VCO including bandgap reference, frequency divider, and buffer amplifiers is 37.4mW from a 1.8V supply voltage

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What this paper is about

This paper presents a 0.18-mum CMOS fully integrated LC VCO, suitable for radio frequency identification (RFID) reader working at 900 MHz. The VCO comprises cross-coupled double core and PMOS tail current source to suppress 1/f noise up conversion. To minimize pulling, the 900 MHz VCO is generated by a 1.8GHz VCO followed by a frequency divider. In addition, current source of this topology was applied bandgap reference to reduce effect of temperature and supply voltage variation, which is caused by unstable oscillation state. The measured result of phase noise is demonstrated with -106 dBc/Hz at 100 kHz offset. The power consumption of the VCO including bandgap reference, frequency divider, and buffer amplifiers is 37.4mW from a 1.8V supply voltage

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Available abstract

This paper presents a 0.18-mum CMOS fully integrated LC VCO, suitable for radio frequency identification (RFID) reader working at 900 MHz. The VCO comprises cross-coupled double core and PMOS tail current source to suppress 1/f noise up conversion. To minimize pulling, the 900 MHz VCO is generated by a 1.8GHz VCO followed by a frequency divider. In addition, current source of this topology was applied bandgap reference to reduce effect of temperature and supply voltage variation, which is caused by unstable oscillation state. The measured result of phase noise is demonstrated with -106 dBc/Hz at 100 kHz offset. The power consumption of the VCO including bandgap reference, frequency divider, and buffer amplifiers is 37.4mW from a 1.8V supply voltage

Key concepts: Voltage-controlled oscillator, Phase noise, Electrical engineering, Frequency divider, dBc, CMOS, Frequency multiplier, Ultra high frequency

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