On-wafer time domain load-pull optimization of transistor load cycle with the new multi-harmonic MPT tuner
Fabien de Groote, Olivier Jardel, Jean-Pierre Teyssier, T. Gasseling, Jan Verspecht, Vince Mallette, Christos Tsironis
Abstract
Fabien de Groote, Olivier Jardel, Jean-Pierre Teyssier, T. Gasseling, Jan Verspecht, Vince Mallette, Christos Tsironis
Abstract
This paper describes an on-wafer measurement setup based on several state of the art features: the LSNA time domain measurement system; the new Multi-Purpose Tuner from Focus Microwaves with fundamental F0 and harmonic 2F0 and 3F0 tuning capabilities from 1.8 to 18 GHz; and the so-called `wave probe' coupling method. The combination of all these equipments allows extensive load-pull investigations with the direct view of the transistor output port load lines. The result of the 2F0 and 3F0 tuning on load lines is demonstrated on a power GaN FET up to 3.4 Watts at 2.4 GHz. It is also shown that different load impedances can provide the same efficiency, but with dramatically different load cycles resulting in a reduced transistor reliability.
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This paper describes an on-wafer measurement setup based on several state of the art features: the LSNA time domain measurement system; the new Multi-Purpose Tuner from Focus Microwaves with fundamental F0 and harmonic 2F0 and 3F0 tuning capabilities from 1.8 to 18 GHz; and the so-called `wave probe' coupling method. The combination of all these equipments allows extensive load-pull investigations with the direct view of the transistor output port load lines. The result of the 2F0 and 3F0 tuning on load lines is demonstrated on a power GaN FET up to 3.4 Watts at 2.4 GHz. It is also shown that different load impedances can provide the same efficiency, but with dramatically different load cycles resulting in a reduced transistor reliability.
Key concepts: Tuner, Load pull, Transistor, Wafer, Harmonic, Electrical impedance, Input impedance, Electrical engineering