2002Unpublished venueRequires access

A novel sub-2.0 V BiCMOS logic circuit with a BiCMOS charge pump

H. Okamura, T. Atsumo, K. Takeda, M. Takada, Kazuo Imai, Y. Kinoshita, T. Yamazaki

Open publisher page 5 citations

Abstract

A novel BiCMOS logic circuit with a BiCMOS charge pump is described. This BiCMOS logic circuit operating with very small input capacitance at low power supply, achieves more than 10 times the speed of CMOS.

About this research paper

What this paper is about

A novel BiCMOS logic circuit with a BiCMOS charge pump is described. This BiCMOS logic circuit operating with very small input capacitance at low power supply, achieves more than 10 times the speed of CMOS.

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OpenAlex reports 5 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

A novel BiCMOS logic circuit with a BiCMOS charge pump is described. This BiCMOS logic circuit operating with very small input capacitance at low power supply, achieves more than 10 times the speed of CMOS.

Key concepts: BiCMOS, Emitter-coupled logic, Electrical engineering, Charge pump, CMOS, Capacitance, Logic gate, Logic level

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