Systolic architectures for computing 2-D DCT based on CORDIC techniques

Proposes two systolic architectures for computing 2D N/spl times/N discrete cosine transforms (DCT), which are based on the CORDIC techniques. First, it is shown that the 2D DCT can be mapped onto a systolic array directly by using row/column decomposition algorithm, where each processing element (PE) requires a ROM module of N words. Second, a new systolic algorithm using the indirect computation method is presented, in which Homer's rule can be used. Correspondingly, the improved array has the advantage of only requiring to store two words in one ROM module of each PE. The two resulting systolic arrays are fully pipelined and composed of only two linear arrays of N CORDIC processors.>