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2008•International Journal of NanomanufacturingRequires access

Simultaneous double side grinding of silicon wafers: a mathematical model for the wafer shape

Z.C. Li, Zhijian Pei, Graham R. Fisher

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Abstract

Silicon wafers are the most widely used substrates for fabricating Integrated Circuits (ICs). The quality of ICs depends directly on the quality of silicon wafers. Simultaneous Double Side Grinding (SDSG) is one of the processes used to flatten the sliced wafers. The literature contains several mathematical models for the wafer shape in Single Side Grinding (SSG). However, no systematical study on the wafer shape in SDSG has been reported. The first part of this paper gives an overview of current mathematical models for the wafer shape in SSG (or SDSG) of silicon wafers. Then a mathematical model for the wafer shape in SDSG of silicon wafers is developed. This developed model is then used to systematically study the effects of several SDSG parameters on the wafer shape.

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What this paper is about

Silicon wafers are the most widely used substrates for fabricating Integrated Circuits (ICs). The quality of ICs depends directly on the quality of silicon wafers. Simultaneous Double Side Grinding (SDSG) is one of the processes used to flatten the sliced wafers. The literature contains several mathematical models for the wafer shape in Single Side Grinding (SSG). However, no systematical study on the wafer shape in SDSG has been reported. The first part of this paper gives an overview of current mathematical models for the wafer shape in SSG (or SDSG) of silicon wafers. Then a mathematical model for the wafer shape in SDSG of silicon wafers is developed. This developed model is then used to systematically study the effects of several SDSG parameters on the wafer shape.

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Available abstract

Silicon wafers are the most widely used substrates for fabricating Integrated Circuits (ICs). The quality of ICs depends directly on the quality of silicon wafers. Simultaneous Double Side Grinding (SDSG) is one of the processes used to flatten the sliced wafers. The literature contains several mathematical models for the wafer shape in Single Side Grinding (SSG). However, no systematical study on the wafer shape in SDSG has been reported. The first part of this paper gives an overview of current mathematical models for the wafer shape in SSG (or SDSG) of silicon wafers. Then a mathematical model for the wafer shape in SDSG of silicon wafers is developed. This developed model is then used to systematically study the effects of several SDSG parameters on the wafer shape.

Key concepts: Wafer, Grinding, Materials science, Wafer backgrinding, Silicon, Integrated circuit, Die preparation, Engineering drawing

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