A low power MPEG-2 decoder chip-set for set-top box
Y. Mogi, Hiroshi Sasaki, Toshiro Ishikawa, Tomaz Mikio Sasaki, L. Sugimoto, Eiji Yamauchi, Nozomu Ozaki, Tokuya Fukuda, H. Koyanagi, H. Sumihiro, Seiichi Emoto, A. Moroboshi
Abstract
Y. Mogi, Hiroshi Sasaki, Toshiro Ishikawa, Tomaz Mikio Sasaki, L. Sugimoto, Eiji Yamauchi, Nozomu Ozaki, Tokuya Fukuda, H. Koyanagi, H. Sumihiro, Seiichi Emoto, A. Moroboshi
Abstract
An extremely low power MPEG-2 decoder chipset, requiring only +3.3 volt power supply, has been developed. We have designed the chip-set with various functionalities to be easily integrated into set-top boxes and other digital applications.
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An extremely low power MPEG-2 decoder chipset, requiring only +3.3 volt power supply, has been developed. We have designed the chip-set with various functionalities to be easily integrated into set-top boxes and other digital applications.
Key concepts: Chipset, Computer science, Set (abstract data type), Chip, System on a chip, Embedded system, Power (physics), Decoding methods