2006Unpublished venueRequires access

Lead free solder bump manufacturing with IBM's C4NP process

Eric Laine, Klaus Ruhmer, E Perfecto, Hai P. Longworth, David Hawken

Open publisher page 1 citations

Abstract

More and more high-end microelectronic devices are being packaged by using solder bumps as the method of interconnection. The two main technologies used are flipchip in package (FCiP) and wafer level chip scale package (WLCSP). The main difference is that FCiP devices are placed on a substrate which then interconnects to the PC board (PCB). WLCSP devices connect directly onto the board. C4NP (C4-new process) is a novel solder bumping technology developed by IBM and commercialized by Suss MicroTec. C4NP addresses the limitations of existing bumping technologies by enabling low-cost, fine pitch bumping using a variety of lead-free solder alloys. C4NP is a solder transfer technology where molten solder is injected into pre-fabricated and reusable glass templates (molds). Mold and wafer are brought into close proximity and solder bumps are transferred onto the entire 300mm (or smaller) wafer in a single process step. C4NP technology is capable of fine pitch bumping while offering the same alloy selection flexibility as solder paste printing. The simplicity of the C4NP process makes it a low cost solution for both, fine-pitch FC in package as well as large pitch/large ball WLCSP bumping applications

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What this paper is about

More and more high-end microelectronic devices are being packaged by using solder bumps as the method of interconnection. The two main technologies used are flipchip in package (FCiP) and wafer level chip scale package (WLCSP). The main difference is that FCiP devices are placed on a substrate which then interconnects to the PC board (PCB). WLCSP devices connect directly onto the board. C4NP (C4-new process) is a novel solder bumping technology developed by IBM and commercialized by Suss MicroTec. C4NP addresses the limitations of existing bumping technologies by enabling low-cost, fine pitch bumping using a variety of lead-free solder alloys. C4NP is a solder transfer technology where molten solder is injected into pre-fabricated and reusable glass templates (molds). Mold and wafer are brought into close proximity and solder bumps are transferred onto the entire 300mm (or smaller) wafer in a single process step. C4NP technology is capable of fine pitch bumping while offering the same alloy selection flexibility as solder paste printing. The simplicity of the C4NP process makes it a low cost solution for both, fine-pitch FC in package as well as large pitch/large ball WLCSP bumping applications

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Available abstract

More and more high-end microelectronic devices are being packaged by using solder bumps as the method of interconnection. The two main technologies used are flipchip in package (FCiP) and wafer level chip scale package (WLCSP). The main difference is that FCiP devices are placed on a substrate which then interconnects to the PC board (PCB). WLCSP devices connect directly onto the board. C4NP (C4-new process) is a novel solder bumping technology developed by IBM and commercialized by Suss MicroTec. C4NP addresses the limitations of existing bumping technologies by enabling low-cost, fine pitch bumping using a variety of lead-free solder alloys. C4NP is a solder transfer technology where molten solder is injected into pre-fabricated and reusable glass templates (molds). Mold and wafer are brought into close proximity and solder bumps are transferred onto the entire 300mm (or smaller) wafer in a single process step. C4NP technology is capable of fine pitch bumping while offering the same alloy selection flexibility as solder paste printing. The simplicity of the C4NP process makes it a low cost solution for both, fine-pitch FC in package as well as large pitch/large ball WLCSP bumping applications

Key concepts: Bumping, Chip-scale package, Soldering, Wafer, Microelectronics, Flip chip, Wafer-level packaging, Materials science

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