A wide bandwidth, high linearity hybrid charge-sensitive preamplifier for high-capacitance silicon detectors

A new hybrid charge-sensitive preamplifier with a sensitivity of 5 mV/MeV has been specifically designed to operate in conjunction with high-capacitance silicon detectors. The shape of the leading edge of its impulse response keeps fast (20 ns) and unchanged over the full output voltage swing (7 V), as is required in nuclear-physics experiments in which Pulse-Shape Analysis is used for particle identification. The circuit is miniaturized onto two sides of a ceramic substrate as small as 17 /spl times/ 23 mm/sup 2/. A low-noise fast discharge technique is used: the return to the high-value feedback resistor (R/sub F/) Comes from a non-inverting low-gain (A) amplifier cascaded to the principal charge-amplifier loop. This yields a reduction of the fall time of a factor A, with no changes of C/sub F/ and R/sub F/ and no added noise. The shorter fall time reduces the pile-up effects in presence of high event rates. Special care has been devoted to the matching between the high capacitance of the detector and that of the input stage of the preamplifier. To match a high capacitance, four BF862 FET's have been connected in parallel.