The hybrid field-programmable architecture
Alireza S. Kaviani, Stephen Dean Brown
Abstract
Alireza S. Kaviani, Stephen Dean Brown
Abstract
The authors propose a new architecture that combines two existing technologies: lookup-table-based FPGAs and complex programmable logic devices based on PLA-like blocks. Their mapping results indicate that on average LUT-based FPGAs require 78% more area than their hybrid FPGA, while providing roughly the same circuit depth.
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The authors propose a new architecture that combines two existing technologies: lookup-table-based FPGAs and complex programmable logic devices based on PLA-like blocks. Their mapping results indicate that on average LUT-based FPGAs require 78% more area than their hybrid FPGA, while providing roughly the same circuit depth.
Key concepts: Field-programmable gate array, Lookup table, Programmable Array Logic, Programmable logic array, Computer science, Computer architecture, Simple programmable logic device, Programmable logic device