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An Extensive Hardware/Software Co-design on a Descriptor-Based Embedded Java Processor

Chi-Hang Yau, Yiyu Tan, Anthony S. Fong, P.L. Mok

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Abstract

Although Java is attractive in many aspects, it is not likely to be popular in embedded market. The obstacle is that Java relies on a Java virtual machine to process the Java bytecodes that imposes large overheads on the embedded system. It is effective to solve this problem by implement an embedded Java processor. In this paper, an extensive co-design version of Java processing system: jHISC V4 is proposed with hardware/software co-design to realize some Java virtual machine overheads in hardware directly. jHISCis a 32-bit object-oriented processor based on the highlevel instruction set computing (HISC) architecture, which extents typical computer architecture to support object-oriented and Java characteristics by using hardware-readable data types called operand descriptors (OD). Our proposed new design not only increases the performance of executing bytecodes, but also enhances the overall system security. In jHISC V4, it speeds up the overall performance on executing object-oriented bytecodes, comparing with the no. of cycles executed on PicoJava II.

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What this paper is about

Although Java is attractive in many aspects, it is not likely to be popular in embedded market. The obstacle is that Java relies on a Java virtual machine to process the Java bytecodes that imposes large overheads on the embedded system. It is effective to solve this problem by implement an embedded Java processor. In this paper, an extensive co-design version of Java processing system: jHISC V4 is proposed with hardware/software co-design to realize some Java virtual machine overheads in hardware directly. jHISCis a 32-bit object-oriented processor based on the highlevel instruction set computing (HISC) architecture, which extents typical computer architecture to support object-oriented and Java characteristics by using hardware-readable data types called operand descriptors (OD). Our proposed new design not only increases the performance of executing bytecodes, but also enhances the overall system security. In jHISC V4, it speeds up the overall performance on executing object-oriented bytecodes, comparing with the no. of cycles executed on PicoJava II.

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Available abstract

Although Java is attractive in many aspects, it is not likely to be popular in embedded market. The obstacle is that Java relies on a Java virtual machine to process the Java bytecodes that imposes large overheads on the embedded system. It is effective to solve this problem by implement an embedded Java processor. In this paper, an extensive co-design version of Java processing system: jHISC V4 is proposed with hardware/software co-design to realize some Java virtual machine overheads in hardware directly. jHISCis a 32-bit object-oriented processor based on the highlevel instruction set computing (HISC) architecture, which extents typical computer architecture to support object-oriented and Java characteristics by using hardware-readable data types called operand descriptors (OD). Our proposed new design not only increases the performance of executing bytecodes, but also enhances the overall system security. In jHISC V4, it speeds up the overall performance on executing object-oriented bytecodes, comparing with the no. of cycles executed on PicoJava II.

Key concepts: Computer science, Java, Embedded Java, Real time Java, strictfp, Java annotation, Java applet, Operating system

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