Evaluation Of Fault Tolerant Structures For Parallel Systems

Computing systems are being used increasingly in applications which demand safe and reliable operation at all times. However, fault-free operation under all operational circumstances cannot be guaranteed. This paper presents an evaluation of fault tolerant structures for parallel systems. A hardware module has been designed and built for this evaluation. It uses the parallel processing device, the transputer, and the software is designed and implemented in occam. A number of tests have been performed on the module, including injected faults in the software, hardware and combinations of both. A number of software fault tolerant strategies are used and some comparative conclusions drawn.