Vertical Power Dissipation Characteristics of Semiconductor Power Devices
Young Suk Chung
Abstract
Young Suk Chung
Abstract
A major challenge in the semiconductor power device technology with continuing shrink in feature sizes and its circuit implementation is power density and heat build-up related problems. This paper discusses a significance of vertical power dissipation characteristics of LDMOS devices with investigating electrical and thermal behaviors under single- and multi-power pulse operations in terms of device substrate dimensions.
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A major challenge in the semiconductor power device technology with continuing shrink in feature sizes and its circuit implementation is power density and heat build-up related problems. This paper discusses a significance of vertical power dissipation characteristics of LDMOS devices with investigating electrical and thermal behaviors under single- and multi-power pulse operations in terms of device substrate dimensions.
Key concepts: LDMOS, Dissipation, Power semiconductor device, Power (physics), Thermal management of electronic devices and systems, Power module, Electrical engineering, Semiconductor device