2005•Unpublished venueRequires access

FPGA implementation of a greedy algorithm for set covering

A. Aloisio, V. Izzo, Salvatore Rampone

Abstract

A version of a new greedy algorithm for approximating minimum set cover is presented. The algorithm, while not randomized, is based on a probability distribution that leads the greedy choice. The algorithm has been specifically tailored to run on platforms with minimal computational hardware. We also describe an implementation based on a FPGA which makes the algorithm suitable for embedded and real-time architectures.

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Key concepts: Greedy algorithm, Set cover problem, Computer science, Greedy randomized adaptive search procedure, Set (abstract data type), Field-programmable gate array, Algorithm, Cover (algebra)