An algorithm for checking slicing floorplan based on HPG and its application
Changwen Zhuang, Xiaoke Zhu, Yoshinori Takashima, Shigetoshi Nakatake, Yoji Kajitani
Abstract
Changwen Zhuang, Xiaoke Zhu, Yoshinori Takashima, Shigetoshi Nakatake, Yoji Kajitani
Abstract
The slicing floorplan has been intensively researched for its naive property to cut-based placement, soft-module packing, designers' intention even after packing and general floorplan representations were proposed. HPG, one easy-to-understand general floorplan representation, was proved to get the optimal solution in a shorter time than other representations. In this paper, we present an algorithm to show another outstanding feature of HPG. By using this algorithm, we can search and find the optimal slicing floorplan easily, which can provide more flexibility for placement and routing tools. Experiments show the effectiveness and promising perspective of our algorithm.
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The slicing floorplan has been intensively researched for its naive property to cut-based placement, soft-module packing, designers' intention even after packing and general floorplan representations were proposed. HPG, one easy-to-understand general floorplan representation, was proved to get the optimal solution in a shorter time than other representations. In this paper, we present an algorithm to show another outstanding feature of HPG. By using this algorithm, we can search and find the optimal slicing floorplan easily, which can provide more flexibility for placement and routing tools. Experiments show the effectiveness and promising perspective of our algorithm.
Key concepts: Floorplan, Slicing, Computer science, Flexibility (engineering), Algorithm, Routing (electronic design automation), Representation (politics), Integrated circuit layout