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2003•Unpublished venueRequires access

SIMD extension to VLIW multicluster processors for embedded applications

Domenico Barretta, William Fornaciari, M. Sami, Danilo Pau

Open publisher page 5 citations

Abstract

We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.

About this research paper

What this paper is about

We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.

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OpenAlex reports 5 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

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Method / approach

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Main findings

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Available abstract

We propose a retargetable architecture, based on a multicluster VLIW processor that can exploit either instruction level parallelism (ILP) or ILP and data level parallelism (DLP) jointly in a SIMD fashion. Simulation results show that performances may increase significantly when the application is compiled for the proposed architecture.

Key concepts: Very long instruction word, SIMD, Computer science, Parallel computing, Parallelism (grammar), Instruction-level parallelism, Exploit, Computer architecture

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