The electromigration and reliability of VLSI metallization under temperature gradient conditions
Guo Weiling, Zhiguo Li, Zhou Tianyi, Cheng Yaohai, Chan Changhua, Sheng Guang-di
Abstract
Guo Weiling, Zhiguo Li, Zhou Tianyi, Cheng Yaohai, Chan Changhua, Sheng Guang-di
Abstract
A novel buried Ti-W self-heating layer structure has been proposed to generate a controlled temperature gradient along the metal stripe. The maximum temperature difference between the highest temperature point of two samples is about /spl plusmn/1.08/spl deg/C. A metal line resistance method was utilized to determine the temperature distribution on the metal line. A series of electromigration (EM) tests were performed at positive and negative temperature gradient stress conditions. The results indicate that the negative temperature gradient greatly improved the failure time of electromigration. The higher the temperature gradient is, the more the mean time to failure (MTF) is increased. When the temperature gradient is the same, the failure time of electromigration will increase with the current density increase.
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A novel buried Ti-W self-heating layer structure has been proposed to generate a controlled temperature gradient along the metal stripe. The maximum temperature difference between the highest temperature point of two samples is about /spl plusmn/1.08/spl deg/C. A metal line resistance method was utilized to determine the temperature distribution on the metal line. A series of electromigration (EM) tests were performed at positive and negative temperature gradient stress conditions. The results indicate that the negative temperature gradient greatly improved the failure time of electromigration. The higher the temperature gradient is, the more the mean time to failure (MTF) is increased. When the temperature gradient is the same, the failure time of electromigration will increase with the current density increase.
Key concepts: Electromigration, Temperature gradient, Materials science, Current density, Metal, Stress (linguistics), Reliability (semiconductor), Line (geometry)