2002Unpublished venueRequires access

Digital low-impedance bus differential protection with reduced requirements for CTs

B. Kasztenny, G. Brunello, Lubomir Sevov

Open publisher page 12 citations

Abstract

The paper presents a new algorithm, its implementation, and results of extensive testing, for a microprocessor-based low-impedance busbar relay. For increased security, the presented technique combines percent differential and current directional protection principles. The directional (phase comparison) principle does not require a voltage signal as it responds to relative directions of the currents. For fast operation, the outlined approach uses an adaptive trip logic that shifts between the 2-of-of-2 operating mode and the differential principle alone depending on a detection of CT saturation. The saturation detector responds to a differential-restraint current trajectory and is capable of detecting saturation occurring as fast as approximately 2 msec into a fault. The presented solution is implemented as a centralized type microprocessor-based relay with a sub-cycle tripping time and exceptional immunity to CT saturation.

About this research paper

What this paper is about

The paper presents a new algorithm, its implementation, and results of extensive testing, for a microprocessor-based low-impedance busbar relay. For increased security, the presented technique combines percent differential and current directional protection principles. The directional (phase comparison) principle does not require a voltage signal as it responds to relative directions of the currents. For fast operation, the outlined approach uses an adaptive trip logic that shifts between the 2-of-of-2 operating mode and the differential principle alone depending on a detection of CT saturation. The saturation detector responds to a differential-restraint current trajectory and is capable of detecting saturation occurring as fast as approximately 2 msec into a fault. The presented solution is implemented as a centralized type microprocessor-based relay with a sub-cycle tripping time and exceptional immunity to CT saturation.

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OpenAlex reports 12 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

The paper presents a new algorithm, its implementation, and results of extensive testing, for a microprocessor-based low-impedance busbar relay. For increased security, the presented technique combines percent differential and current directional protection principles. The directional (phase comparison) principle does not require a voltage signal as it responds to relative directions of the currents. For fast operation, the outlined approach uses an adaptive trip logic that shifts between the 2-of-of-2 operating mode and the differential principle alone depending on a detection of CT saturation. The saturation detector responds to a differential-restraint current trajectory and is capable of detecting saturation occurring as fast as approximately 2 msec into a fault. The presented solution is implemented as a centralized type microprocessor-based relay with a sub-cycle tripping time and exceptional immunity to CT saturation.

Key concepts: Tripping, Relay, Busbar, Differential protection, Protective relay, Microprocessor, Electrical impedance, Saturation (graph theory)

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