A Low-Power 75dB Digitally Programmable CMOS Variable-Gain Amplifier
Behnoosh Rahmatian, Shahriar Mirabbasi
Abstract
Behnoosh Rahmatian, Shahriar Mirabbasi
Abstract
A monolithic low-power digitally programmable variable-gain amplifier (VGA) with a gain range of 75 dB is presented. The core of the design is based on a low-distortion source-degenerated differential amplifier structure. The gain is varied by changing the source-degeneration resistor as well as tuning the resistors in the common-mode feedback circuitry. The overall VGA consists of three gain stages. As a proof of concept, a 24 dB single gain stage with 2 dB gain steps is fabricated in a 0.18 mum CMOS technology. Based on the measurement results of the prototype chip, the performance of the gain stage is optimized and a three-stage 75 dB VGA is designed and simulated. The overall gain can be varied from -15 dB to 60 dB in 2.5 dB gain steps. The bandwidth of the multi-stage VGA is higher than 140 MHz and the gain error is less than 0.3 dB. The overall VGA draws 6.5 mA from a 1.8 V supply. The noise figure of the system at maximum gain is 12.5 dB, and the IIP3 at minimum gain is 14.4 dBm.
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A monolithic low-power digitally programmable variable-gain amplifier (VGA) with a gain range of 75 dB is presented. The core of the design is based on a low-distortion source-degenerated differential amplifier structure. The gain is varied by changing the source-degeneration resistor as well as tuning the resistors in the common-mode feedback circuitry. The overall VGA consists of three gain stages. As a proof of concept, a 24 dB single gain stage with 2 dB gain steps is fabricated in a 0.18 mum CMOS technology. Based on the measurement results of the prototype chip, the performance of the gain stage is optimized and a three-stage 75 dB VGA is designed and simulated. The overall gain can be varied from -15 dB to 60 dB in 2.5 dB gain steps. The bandwidth of the multi-stage VGA is higher than 140 MHz and the gain error is less than 0.3 dB. The overall VGA draws 6.5 mA from a 1.8 V supply. The noise figure of the system at maximum gain is 12.5 dB, and the IIP3 at minimum gain is 14.4 dBm.
Key concepts: Video Graphics Array, Variable-gain amplifier, Open-loop gain, Programmable-gain amplifier, Fully differential amplifier, CMOS, Automatic gain control, Noise figure