Tunable High-Q N-Path Band-Pass Filters: Modeling and Verification
Amir Ghaffari, Eric A.M. Klumperink, Michiel C. M. Soer, Bram Nauta
Abstract
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Amir Ghaffari, Eric A.M. Klumperink, Michiel C. M. Soer, Bram Nauta
Abstract
Open-access reader
A differential single-port switched-RC N-path filter with band-pass characteristic is proposed. The switching frequency defines the center frequency, while the RC-time and duty cycle of the clock define the bandwidth. This allows for high-Q highly tunable filters which can for instance be useful for cognitive radio. Using a linear periodically time-variant (LPTV) model, exact expressions for the filter transfer function are derived. The behavior of the circuit including non-idealities such as maximum rejection, spectral aliasing, noise and effects due to mismatch in the paths is modeled and verified via measurements. A simple RLC equivalent circuit is provided, modeling bandwidth, quality factor and insertion loss of the filter. A 4-path architecture is realized in 65 nm CMOS. An off-chip transformer acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant$-$3 dB bandwidth of 35 MHz and can be tuned from 100 MHz up to 1 GHz. Over the whole band, IIP3 is better than 14 dBm,${\rm P}_{\rm 1dB}=2\ $dBm and the noise figure is 3–5 dB, while the power dissipation increases from 2 mW to 16 mW (only clocking power).
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A differential single-port switched-RC N-path filter with band-pass characteristic is proposed. The switching frequency defines the center frequency, while the RC-time and duty cycle of the clock define the bandwidth. This allows for high-Q highly tunable filters which can for instance be useful for cognitive radio. Using a linear periodically time-variant (LPTV) model, exact expressions for the filter transfer function are derived. The behavior of the circuit including non-idealities such as maximum rejection, spectral aliasing, noise and effects due to mismatch in the paths is modeled and verified via measurements. A simple RLC equivalent circuit is provided, modeling bandwidth, quality factor and insertion loss of the filter. A 4-path architecture is realized in 65 nm CMOS. An off-chip transformer acts as a balun, improves filter-Q and realizes impedance matching. The differential architecture reduces clock-leakage and suppresses selectivity around even harmonics of the clock. The filter has a constant$-$3 dB bandwidth of 35 MHz and can be tuned from 100 MHz up to 1 GHz. Over the whole band, IIP3 is better than 14 dBm,${\rm P}_{\rm 1dB}=2\ $dBm and the noise figure is 3–5 dB, while the power dissipation increases from 2 mW to 16 mW (only clocking power).
Key concepts: Passband, Center frequency, Bandwidth (computing), Electronic engineering, Filter (signal processing), Topology (electrical circuits), Balun, Band-pass filter