Systematic embedded software generation from SystemC
Fernando Herrera, Héctor Posadas, Pablo Sánchez, Eugenio Villar
Abstract
Fernando Herrera, Héctor Posadas, Pablo Sánchez, Eugenio Villar
Abstract
The embedded software design cost represents an important percentage of the embedded-system development costs. This paper presents a method for systematic embedded software generation that reduces the software generation cost in a platform-based HW/SW codesign methodology for embedded systems based on SystemC. The goal is that the same SystemC code allows system-level specification and verification, and, after SW/HW partitioning, SW/HW co-simulation and embedded software generation. The C++ code for the SW partition (processes and process communication, including HW/SW interfaces) is systematically generated, including the user-selected embedded OS (e.g.: the eCos open source OS).
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The embedded software design cost represents an important percentage of the embedded-system development costs. This paper presents a method for systematic embedded software generation that reduces the software generation cost in a platform-based HW/SW codesign methodology for embedded systems based on SystemC. The goal is that the same SystemC code allows system-level specification and verification, and, after SW/HW partitioning, SW/HW co-simulation and embedded software generation. The C++ code for the SW partition (processes and process communication, including HW/SW interfaces) is systematically generated, including the user-selected embedded OS (e.g.: the eCos open source OS).
Key concepts: SystemC, Computer science, Embedded software, Embedded system, Code generation, Software, Partition (number theory), Electronic system-level design and verification