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2006•Unpublished venueRequires access

A rail to rail, slew-boosted pre-charge buffer

H. Dine, Sheng-Chih Chuang, P.E. Allen, P. Hasler

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Abstract

A pre-charge buffer is designed in a 0.5 /spl mu/m CMOS process. The buffer has rail to rail input capability, and makes use of a slew boosting mechanism, which senses current to enhance slew rate. Sensing current avoids overshoots when the buffer exits the slew-mode. The buffer has less than 60 ns settling time with better than 2 % settling accuracy. The slew rate is 156 V//spl mu/s with a quiescent current of 265 /spl mu/A.

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What this paper is about

A pre-charge buffer is designed in a 0.5 /spl mu/m CMOS process. The buffer has rail to rail input capability, and makes use of a slew boosting mechanism, which senses current to enhance slew rate. Sensing current avoids overshoots when the buffer exits the slew-mode. The buffer has less than 60 ns settling time with better than 2 % settling accuracy. The slew rate is 156 V//spl mu/s with a quiescent current of 265 /spl mu/A.

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Available abstract

A pre-charge buffer is designed in a 0.5 /spl mu/m CMOS process. The buffer has rail to rail input capability, and makes use of a slew boosting mechanism, which senses current to enhance slew rate. Sensing current avoids overshoots when the buffer exits the slew-mode. The buffer has less than 60 ns settling time with better than 2 % settling accuracy. The slew rate is 156 V//spl mu/s with a quiescent current of 265 /spl mu/A.

Key concepts: Slew rate, Settling time, Buffer (optical fiber), Buffer amplifier, Current (fluid), CMOS, Electronic engineering, Electrical engineering

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