A novel register organization for VLIW digital signal processors
Tay-Jyi Lin, Chen-Chia Lee, Youfu Li, Chein-Wei Jen
Abstract
Tay-Jyi Lin, Chen-Chia Lee, Youfu Li, Chein-Wei Jen
Abstract
This paper presents a novel register organization for VLIW DSPs. The simulation results show the performance of a DSP with the proposed register file is comparable with state-of-the-art DSPs. However, the proposed register file can save 89.7% area of a conventional centralized one, while reducing its access time by 68.6%.
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This paper presents a novel register organization for VLIW DSPs. The simulation results show the performance of a DSP with the proposed register file is comparable with state-of-the-art DSPs. However, the proposed register file can save 89.7% area of a conventional centralized one, while reducing its access time by 68.6%.
Key concepts: Register file, Very long instruction word, Computer science, Register (sociolinguistics), Digital signal processing, Processor register, Register allocation, Digital signal processor