2012Unpublished venueRequires access

A 90nm CMOS gated-ring-oscillator-based 2-dimension Vernier time-to-digital converter

Ping Lu, Pietro Andreani, Antonio Liscidini

Open publisher page 7 citations

Abstract

Two branches of gated ring oscillators (GRO) act as the delay lines in 2-dimension Vernier time-to-digital converter (TDC). The proposed architecture reduces dramatically the inherent latency of vernier structure. The already small quantization noise of the standard Vernier TDC is further first-order shaped by the GRO operation. The TDC has been simulated in 90nm CMOS technology. Operating from 50MHz reference frequency, it achieves a resolution better than 2ps assuming a signal bandwidth of 1.56MHz (OSR=16), for a minimum current consumption of 1.8mA from 1.2V.

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What this paper is about

Two branches of gated ring oscillators (GRO) act as the delay lines in 2-dimension Vernier time-to-digital converter (TDC). The proposed architecture reduces dramatically the inherent latency of vernier structure. The already small quantization noise of the standard Vernier TDC is further first-order shaped by the GRO operation. The TDC has been simulated in 90nm CMOS technology. Operating from 50MHz reference frequency, it achieves a resolution better than 2ps assuming a signal bandwidth of 1.56MHz (OSR=16), for a minimum current consumption of 1.8mA from 1.2V.

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OpenAlex reports 7 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Available abstract

Two branches of gated ring oscillators (GRO) act as the delay lines in 2-dimension Vernier time-to-digital converter (TDC). The proposed architecture reduces dramatically the inherent latency of vernier structure. The already small quantization noise of the standard Vernier TDC is further first-order shaped by the GRO operation. The TDC has been simulated in 90nm CMOS technology. Operating from 50MHz reference frequency, it achieves a resolution better than 2ps assuming a signal bandwidth of 1.56MHz (OSR=16), for a minimum current consumption of 1.8mA from 1.2V.

Key concepts: Vernier scale, Time-to-digital converter, CMOS, Ring oscillator, Latency (audio), Electronic engineering, Computer science, Quantization (signal processing)

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