2010•Unpublished venueRequires access

Three novel improved CMOS capacitance scaling schemes

Jesus Aguado Ruiz, Antonio J. López‐Martín, J. Ramı́rez-Angulo

Abstract

Three novel CMOS capacitance scaling schemes, a comparison between them and some different classic schemes are presented. The novel topologies which use a modified second generation current conveyor, an improved current mirror and a current steering configuration of OTA provide higher values of Q and better frequency responses than the classical structures using basic current mirror schemes, as the simple current mirror and two different cascode current mirrors. Simulation results for the six different studied schemes are presented.

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Available abstract

Key concepts: Current mirror, Current conveyor, Capacitance, CMOS, Cascode, Current (fluid), Electronic engineering, Scaling