RF-MEMS wafer-level packaging using through-wafer via technology
J. Tian, Jacopo Iannacci, S. Sosin, R. Gaddi, M. Bartek
Abstract
J. Tian, Jacopo Iannacci, S. Sosin, R. Gaddi, M. Bartek
Abstract
This paper presents wafer-level packaging (WLP) solution for RF-MEMS applications based on through-wafer via (TWV) technology in high-resistivity silicon (HRS). A pre-processed HRS capping wafer containing recesses and vertical Cu-plated TWV interconnect is, after alignment, bonded to the RF-MEMS wafer providing environmental protection and easy signal access. Optionally, cavities can be formed simultaneously with TWV in the capping wafer, which allows hybrid co-integration of additional IC dies while maintaining overall thickness of the resulting SMT compatible package. This cavity can also be used for a first-level wafer-to-wafer alignment accuracy check. After bonding, the s-parameter measurement at giga hertz level shows little influence introduced by the capping substrate.
OpenAlex reports 16 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
This paper presents wafer-level packaging (WLP) solution for RF-MEMS applications based on through-wafer via (TWV) technology in high-resistivity silicon (HRS). A pre-processed HRS capping wafer containing recesses and vertical Cu-plated TWV interconnect is, after alignment, bonded to the RF-MEMS wafer providing environmental protection and easy signal access. Optionally, cavities can be formed simultaneously with TWV in the capping wafer, which allows hybrid co-integration of additional IC dies while maintaining overall thickness of the resulting SMT compatible package. This cavity can also be used for a first-level wafer-to-wafer alignment accuracy check. After bonding, the s-parameter measurement at giga hertz level shows little influence introduced by the capping substrate.
Key concepts: Wafer, Wafer-level packaging, Wafer testing, Microelectromechanical systems, Materials science, Wafer backgrinding, Optoelectronics, Die preparation