2013•Applied Mechanics and MaterialsRequires access

Research on Algorithm in Fast Modular Exponentiation Based on FPGA

Lian Qing Zhao, Shu Li, Yuan Xun Chen, Dong Jun Liu

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Abstract

Modular exponentiation of large number is widely applied in public-key cryptosystem, also the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed on FPGA to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024 bit key operands, the design can be run at 170MHz.

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What this paper is about

Modular exponentiation of large number is widely applied in public-key cryptosystem, also the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed on FPGA to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024 bit key operands, the design can be run at 170MHz.

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Available abstract

Modular exponentiation of large number is widely applied in public-key cryptosystem, also the bottleneck in the computation of public-key algorithm. Modular multiplication is the key calculation in modular exponentiation. An improved Montgomery algorithm is utilized to achieve modular multiplication and converted into systolic array to increase the running frequency. A high efficiency fast modular exponentiation structure is developed on FPGA to bring the best out of the modular multiplication module and enhance the ability of defending timing attacks and power attacks. For 1024 bit key operands, the design can be run at 170MHz.

Key concepts: Modular exponentiation, Modular arithmetic, Operand, Modular design, Key (lock), Field-programmable gate array, Bottleneck, Computer science

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