1982IEEE Journal of Solid-State CircuitsRequires access

High-frequency transistor modeling for circuit simulation

R. G. Gough

Open publisher page 10 citations

Abstract

The typical S parameters for the HP35826E microwave transistor have been used to derive a transistor model which is suitable for use in circuit analysis programs. The RMS difference between the S parameters of the model and the transistor data is 0.33 dB and 3.3/spl deg/ for frequencies between 0.1 and 8 GHz and DC collector currents between 5 and 20 mA. It is shown that the inclusion of time delays at the collector and base of the transistor model greatly improves the accuracy of the transistor model. With the inclusion of the time delays in the transisting model, a one-section R-C ladder network can be used to model the behavior of the base-emitter junction up to frequencies of the order of 2f/SUB T/.

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What this paper is about

The typical S parameters for the HP35826E microwave transistor have been used to derive a transistor model which is suitable for use in circuit analysis programs. The RMS difference between the S parameters of the model and the transistor data is 0.33 dB and 3.3/spl deg/ for frequencies between 0.1 and 8 GHz and DC collector currents between 5 and 20 mA. It is shown that the inclusion of time delays at the collector and base of the transistor model greatly improves the accuracy of the transistor model. With the inclusion of the time delays in the transisting model, a one-section R-C ladder network can be used to model the behavior of the base-emitter junction up to frequencies of the order of 2f/SUB T/.

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Available abstract

The typical S parameters for the HP35826E microwave transistor have been used to derive a transistor model which is suitable for use in circuit analysis programs. The RMS difference between the S parameters of the model and the transistor data is 0.33 dB and 3.3/spl deg/ for frequencies between 0.1 and 8 GHz and DC collector currents between 5 and 20 mA. It is shown that the inclusion of time delays at the collector and base of the transistor model greatly improves the accuracy of the transistor model. With the inclusion of the time delays in the transisting model, a one-section R-C ladder network can be used to model the behavior of the base-emitter junction up to frequencies of the order of 2f/SUB T/.

Key concepts: Transistor, Transistor model, Multiple-emitter transistor, Equivalent circuit, Static induction transistor, Bipolar junction transistor, Common emitter, Base (topology)

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