2014Unpublished venueOpen access

Power and Chip-Area Aware Network-on-Chip Modeling for System on Chip Simulation

Masoud Oveis-Gharan, Gul N. Khan

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Abstract

In this paper, a Flexible And Accurate Network-On-chip Simulator (FAANOS) is introduced. NoC is a critical structure for system-on-chip design. We discuss the structure of its various components by presenting their details. We also provide an analytical methodology that employs the micro-architectur

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In this paper, a Flexible And Accurate Network-On-chip Simulator (FAANOS) is introduced. NoC is a critical structure for system-on-chip design. We discuss the structure of its various components by presenting their details. We also provide an analytical methodology that employs the micro-architectur

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Available abstract

In this paper, a Flexible And Accurate Network-On-chip Simulator (FAANOS) is introduced. NoC is a critical structure for system-on-chip design. We discuss the structure of its various components by presenting their details. We also provide an analytical methodology that employs the micro-architectur

Key concepts: Chip, Network on a chip, System on a chip, Computer science, Embedded system, Power (physics), Power network design, Computer architecture

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