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Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator

Silvina Zimi Hanono, Srinivas Devadas

Open publisher page 118 citations

Abstract

The AVIV retargetable code generator produces optimized machine code for target processors with different instruction set architectures AVIV optimizes for minimum code size.

About this research paper

What this paper is about

The AVIV retargetable code generator produces optimized machine code for target processors with different instruction set architectures AVIV optimizes for minimum code size.

Why it matters

OpenAlex reports 118 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

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Method / approach

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Main findings

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Limitations

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Applications

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Available abstract

The AVIV retargetable code generator produces optimized machine code for target processors with different instruction set architectures AVIV optimizes for minimum code size.

Key concepts: Computer science, Tel aviv, Scheduling (production processes), Selection (genetic algorithm), Processor scheduling, Parallel computing, Distributed computing, Computer network

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Instruction selection, resource allocation, and scheduling in the AVIV retargetable code generator — Research Paper | ScholarLens