2006•Conference proceedingsRequires access

Power optimization of Sequential Circuits by Retiming and Rewiring

Zahra Jeddi, Esmail Amini

Open publisher page 2 citations

Abstract

In this paper, a new method for decreasing dynamic power consumption of sequential circuits is presented. To achieve this, the hybrid of rewiring and retiming methods is used. Rewiring is utilized to reduce the total transitions within the combinational parts of the sequential circuit. Retiming is used to change the topology of combinational parts when rewiring can not optimize those parts, in order to create new chance for optimization of those blocks. As of benchmarking three of ISCAS89 circuits were employed. Experimental results have shown that this scheme will decrease the switching activity of implemented circuits from 14% to 29.9%.

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What this paper is about

In this paper, a new method for decreasing dynamic power consumption of sequential circuits is presented. To achieve this, the hybrid of rewiring and retiming methods is used. Rewiring is utilized to reduce the total transitions within the combinational parts of the sequential circuit. Retiming is used to change the topology of combinational parts when rewiring can not optimize those parts, in order to create new chance for optimization of those blocks. As of benchmarking three of ISCAS89 circuits were employed. Experimental results have shown that this scheme will decrease the switching activity of implemented circuits from 14% to 29.9%.

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Available abstract

In this paper, a new method for decreasing dynamic power consumption of sequential circuits is presented. To achieve this, the hybrid of rewiring and retiming methods is used. Rewiring is utilized to reduce the total transitions within the combinational parts of the sequential circuit. Retiming is used to change the topology of combinational parts when rewiring can not optimize those parts, in order to create new chance for optimization of those blocks. As of benchmarking three of ISCAS89 circuits were employed. Experimental results have shown that this scheme will decrease the switching activity of implemented circuits from 14% to 29.9%.

Key concepts: Retiming, Sequential logic, Electronic circuit, Combinational logic, Computer science, Power (physics), Digital electronics, Electronic engineering

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