2012Unpublished venueRequires access

A down converter active mixer, in 0.25µm CMOS process for ultra wide-band applications

B Iji Ayobami, Forest Zhu, Michael Heimlich

Open publisher page 7 citations

Abstract

This paper presents improvement technique on linearity of a CMOS double balance Gilbert cell mixer with considerable high conversion gain at low power consumption. The mixer consists of inductive source degeneration in the transconductance stage providing impedance matching to improve linearity of the mixer. The mixer was designed to operate a Radio Frequency (RF) signal of 4GHz, a Local Oscillator frequency (LO) of 3.75GHz, thus providing an Intermediate Frequency (IF) of 0.25GHz. The circuit presents an Input third order Intercept point (IIP3) of +1dBm. A conversion gain of 10.45dB and a single sideband noise of 8dB over the band width. The DC power consumed by the core mixer is 4.5mW. The proposed active mixer design was made in 0.25µm CMOS Silanna process, suitable for wideband applications.

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What this paper is about

This paper presents improvement technique on linearity of a CMOS double balance Gilbert cell mixer with considerable high conversion gain at low power consumption. The mixer consists of inductive source degeneration in the transconductance stage providing impedance matching to improve linearity of the mixer. The mixer was designed to operate a Radio Frequency (RF) signal of 4GHz, a Local Oscillator frequency (LO) of 3.75GHz, thus providing an Intermediate Frequency (IF) of 0.25GHz. The circuit presents an Input third order Intercept point (IIP3) of +1dBm. A conversion gain of 10.45dB and a single sideband noise of 8dB over the band width. The DC power consumed by the core mixer is 4.5mW. The proposed active mixer design was made in 0.25µm CMOS Silanna process, suitable for wideband applications.

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Available abstract

This paper presents improvement technique on linearity of a CMOS double balance Gilbert cell mixer with considerable high conversion gain at low power consumption. The mixer consists of inductive source degeneration in the transconductance stage providing impedance matching to improve linearity of the mixer. The mixer was designed to operate a Radio Frequency (RF) signal of 4GHz, a Local Oscillator frequency (LO) of 3.75GHz, thus providing an Intermediate Frequency (IF) of 0.25GHz. The circuit presents an Input third order Intercept point (IIP3) of +1dBm. A conversion gain of 10.45dB and a single sideband noise of 8dB over the band width. The DC power consumed by the core mixer is 4.5mW. The proposed active mixer design was made in 0.25µm CMOS Silanna process, suitable for wideband applications.

Key concepts: Frequency mixer, Electronic mixer, Harmonic mixer, CMOS, Transconductance, Intermediate frequency, Electrical engineering, Radio frequency

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