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AN EXPERIMENT WITH A LOGIC PROGRAM EXECUTION MODEL ON THE TRANSPUTER

Kang Zhang

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Abstract

This paper discusses an experiment with a dataflow execution model for logic programs implemented on the transputer. The execution model is supported by a dataflow virtual machine, on which the execution mechanism for AND/OR-parallelism is developed. The real-time evaluation shows that small scale parallelism can be exploited from the dataflow graphs compiled from the logic programs. A conventional dataflow architecture supporting the implemented model has been emulated on a multitransputer system.

About this research paper

What this paper is about

This paper discusses an experiment with a dataflow execution model for logic programs implemented on the transputer. The execution model is supported by a dataflow virtual machine, on which the execution mechanism for AND/OR-parallelism is developed. The real-time evaluation shows that small scale parallelism can be exploited from the dataflow graphs compiled from the logic programs. A conventional dataflow architecture supporting the implemented model has been emulated on a multitransputer system.

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OpenAlex reports 2 citations for this work. Citation counts describe recorded attention and do not establish research quality.

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Method / approach

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Available abstract

This paper discusses an experiment with a dataflow execution model for logic programs implemented on the transputer. The execution model is supported by a dataflow virtual machine, on which the execution mechanism for AND/OR-parallelism is developed. The real-time evaluation shows that small scale parallelism can be exploited from the dataflow graphs compiled from the logic programs. A conventional dataflow architecture supporting the implemented model has been emulated on a multitransputer system.

Key concepts: Dataflow, Dataflow architecture, Transputer, Computer science, Parallel computing, Parallelism (grammar), Computer architecture, Programming language

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