Design of an Algorithmic State Machine Controlled, Field Programmable Gate Array Based 16-bit Microprocessor
Shirazy Md. Shorab Muslim, Zahir Uddin Ahmad
Abstract
Shirazy Md. Shorab Muslim, Zahir Uddin Ahmad
Abstract
A 16-bit microprocessor is designed by top-down design methodology which is controlled by an ASM (algorithm state machine) chart and fitted it into an FPGA (field programmable gate array). The verified simulation result and post route simulation result is shown in this paper. The synthesis result of the design is also described here.
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A 16-bit microprocessor is designed by top-down design methodology which is controlled by an ASM (algorithm state machine) chart and fitted it into an FPGA (field programmable gate array). The verified simulation result and post route simulation result is shown in this paper. The synthesis result of the design is also described here.
Key concepts: Field-programmable gate array, Microprocessor, Gate array, Programmable Array Logic, Programmable logic array, Computer science, State (computer science), Field (mathematics)