2006•IntegrationRequires access

Constrained algorithmic IP design for system-on-chip

Philippe Coussy, Emmanuel Casseau, Pierre Bomel, Adel Baganne, Eric J. Martin

Open publisher page 3 citations

Abstract

This record does not include an abstract. Use the full-text link above if available.

About this research paper

What this paper is about

An abstract is not available in the OpenAlex record for this paper.

Why it matters

OpenAlex reports 3 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Key concepts: Computer science, Design flow, Digital signal processing, System on a chip, High-level synthesis, Computer architecture, Embedded system, Context (archaeology)

Back to paper search Browse research topics Original source

Constrained algorithmic IP design for system-on-chip — Research Paper | ScholarLens