1993•Microprocessing and MicroprogrammingRequires access

URPR-1: A single-chip VLIW architecture

Bogong Su, Jian Wang, Zhizhong Tang, Cihong Zhang, Wei Min Zhao

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Key concepts: Computer science, Very long instruction word, Register file, Compiler, Pipeline (software), Parallel computing, Computer architecture, Architecture

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URPR-1: A single-chip VLIW architecture — Research Paper | ScholarLens