2006Unpublished venueRequires access

Low-voltage, Low-power and High-gain Mixer Based on Unbalanced Mixer Cell

No Gil Myoung, Ho Youl Kang, Seok Kim, Byoung Ho Choi, Seong-Su Park, Chul Park

Open publisher page 10 citations

Abstract

A low-voltage, low-power and high-gain mixer core structure based on the unbalanced mixer cell or square-law mixer cell for 5GHz wireless LAN applications is presented in this paper. To reduce power dissipation, a new single-balanced mixer was proposed which operates under a low supply voltage and with the current reuse technique. The circuit was designed with a 0.18mum CMOS process. The designed down-conversion mixer has a maximum conversion gain of 22dB with LO power of -2.5dBm. However, with small LO power of -10dBm, -15dBm and -20dBm the mixer shows a moderate conversion gain of 14.9dB, 10dB and 5.1dB, and an input P1dB of -14dBm, -9.5dBm and -4.5dBm, and an input IP3 of -4.5dBm, 0dBm and 5dBm, respectively. The designed mixer including a bias circuit consumes 1.2mA under a 1.5V supply voltage. The chip size including pads is 0.77mm times 0.81mm

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What this paper is about

A low-voltage, low-power and high-gain mixer core structure based on the unbalanced mixer cell or square-law mixer cell for 5GHz wireless LAN applications is presented in this paper. To reduce power dissipation, a new single-balanced mixer was proposed which operates under a low supply voltage and with the current reuse technique. The circuit was designed with a 0.18mum CMOS process. The designed down-conversion mixer has a maximum conversion gain of 22dB with LO power of -2.5dBm. However, with small LO power of -10dBm, -15dBm and -20dBm the mixer shows a moderate conversion gain of 14.9dB, 10dB and 5.1dB, and an input P1dB of -14dBm, -9.5dBm and -4.5dBm, and an input IP3 of -4.5dBm, 0dBm and 5dBm, respectively. The designed mixer including a bias circuit consumes 1.2mA under a 1.5V supply voltage. The chip size including pads is 0.77mm times 0.81mm

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Available abstract

A low-voltage, low-power and high-gain mixer core structure based on the unbalanced mixer cell or square-law mixer cell for 5GHz wireless LAN applications is presented in this paper. To reduce power dissipation, a new single-balanced mixer was proposed which operates under a low supply voltage and with the current reuse technique. The circuit was designed with a 0.18mum CMOS process. The designed down-conversion mixer has a maximum conversion gain of 22dB with LO power of -2.5dBm. However, with small LO power of -10dBm, -15dBm and -20dBm the mixer shows a moderate conversion gain of 14.9dB, 10dB and 5.1dB, and an input P1dB of -14dBm, -9.5dBm and -4.5dBm, and an input IP3 of -4.5dBm, 0dBm and 5dBm, respectively. The designed mixer including a bias circuit consumes 1.2mA under a 1.5V supply voltage. The chip size including pads is 0.77mm times 0.81mm

Key concepts: Frequency mixer, Electronic mixer, Electrical engineering, CMOS, Voltage, Power (physics), Low voltage, Electronic engineering

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