Testing and Diagnosing Dynamic Reconfigurable FPGA
Chi-Feng Wu, Cheng‐Wen Wu, Cheng-Wen Wu, Cheng-Wen Wu
Abstract
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Chi-Feng Wu, Cheng‐Wen Wu, Cheng-Wen Wu, Cheng-Wen Wu
Abstract
Open-access reader
Dynamic reconfigurable field‐programmable logic arrays (FPGAs) are receiving notable attention because of their much shorter reconfiguration time as compared with traditional FPGAs. The short reconfiguration time is vital to applications such as reconfigurable computing and emulation. We show in this paper that testing and diagnosis of the FPGA also can take advantage of its dynamic reconfigurability. We first propose an efficient methodology for testing the interconnects of the FPGA, then present several universal test and diagnosis approaches which cover all functional units of the FPGA. Experimental results show that our approach significantly reduces the testing time, without additional cost for diagnosis.
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Dynamic reconfigurable field‐programmable logic arrays (FPGAs) are receiving notable attention because of their much shorter reconfiguration time as compared with traditional FPGAs. The short reconfiguration time is vital to applications such as reconfigurable computing and emulation. We show in this paper that testing and diagnosis of the FPGA also can take advantage of its dynamic reconfigurability. We first propose an efficient methodology for testing the interconnects of the FPGA, then present several universal test and diagnosis approaches which cover all functional units of the FPGA. Experimental results show that our approach significantly reduces the testing time, without additional cost for diagnosis.
Key concepts: Reconfigurability, Field-programmable gate array, Control reconfiguration, Emulation, Reconfigurable computing, Computer science, Embedded system, Computer architecture