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2013•SID Symposium Digest of Technical PapersRequires access

31.3: A 10‐bit CMOS Digital‐to‐Analog Converter with Logarithmic Time Interpolation

Mungyu Kim, Hoon‐Ju Chung, Young‐Chan Jang

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Abstract

Abstract A 10‐bit logarithmic time interpolation digital‐to‐analog converter (DAC) which consists of a 7‐bit resistor string, a 7‐bit two‐step decoder, a 2‐bit logarithmic time interpolator, and a buffer amplifier is proposed for data‐driver integrated circuits of active‐matrix liquid crystal display systems. It occupies 57% of the area of the conventional 10‐bit resistor‐string DAC. The DNL and INL of the implemented 10‐bit DAC were +0.29/‐0.30 and +0.47/‐0.36 LSB, respectively, where 1 LSB is equal to about 4.5 mV.

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What this paper is about

Abstract A 10‐bit logarithmic time interpolation digital‐to‐analog converter (DAC) which consists of a 7‐bit resistor string, a 7‐bit two‐step decoder, a 2‐bit logarithmic time interpolator, and a buffer amplifier is proposed for data‐driver integrated circuits of active‐matrix liquid crystal display systems. It occupies 57% of the area of the conventional 10‐bit resistor‐string DAC. The DNL and INL of the implemented 10‐bit DAC were +0.29/‐0.30 and +0.47/‐0.36 LSB, respectively, where 1 LSB is equal to about 4.5 mV.

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Available abstract

Abstract A 10‐bit logarithmic time interpolation digital‐to‐analog converter (DAC) which consists of a 7‐bit resistor string, a 7‐bit two‐step decoder, a 2‐bit logarithmic time interpolator, and a buffer amplifier is proposed for data‐driver integrated circuits of active‐matrix liquid crystal display systems. It occupies 57% of the area of the conventional 10‐bit resistor‐string DAC. The DNL and INL of the implemented 10‐bit DAC were +0.29/‐0.30 and +0.47/‐0.36 LSB, respectively, where 1 LSB is equal to about 4.5 mV.

Key concepts: Least significant bit, 12-bit, 8-bit, Bit (key), Digital-to-analog converter, Differential nonlinearity, CMOS, Logarithm

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