A10-GHz 0.88-mW low-phase-noise CMOS VCO

In this paper, a 1.2-V 10-GHz low-power low-noise VCO is designed and fabricated in a 0.18 mum CMOS process. By using noise-reduction techniques associated with the current-reused structure, the VCO can achieve lower power consumption and phase noise. The simulated power consumption is 0.88-mW. The simulated phase noise is-114.8-dBc/Hz at 1-MHz offset frequencies. The attained FOM is-191.