2007•Unpublished venueRequires access
Hierarchical Power Distribution with 20 Power Domains in 90-nm Low-Power Multi-CPU Processor
Yusuke Kanno, Hiroyuki Mizuno, Yoshihiko Yasu, Kei Hirose, Yasuhisa Shimazaki, Tadashi Hoshi, Yujiro Miyairi, T. Ishii, Tetsuya Yamada, Takahiro Irita, Toshihiro Hattori, Kazumasa Yanagisawa, Naohiko Irie
Open publisher page 8 citations
Abstract
Hierarchical power distribution with a power tree has been developed. The key features are power tree management rules and a distributed common power-domain implementation. The hierarchical power distribution supports a fine-grained power gating with dozens of power domains, which is analogous to a fine-grained clock gating. Leakage currents of a 1,000,000-gate power domain were effectively reduced to 1/4,000 in multi-CPU SoCs with minimal area overhead.