Implementation of recursive Ling adders in CMOS VLSI

This paper presents a number of practical suggestions for implementing recursive Ling adders in deep-submicron CMOS VLSI. These adders were introduced by Jackson and Talwar in 2002 but no subsequent work has appeared describing their VLSI realisation. In this paper, we discuss how such adders might be implemented and show that recursive Ling adders are up to 34% smaller for the same speed or up to 15% faster for the same area than other recently-announced 16- and 32-b CMOS VLSI adders.