Voltage scheduling problem for dynamically variable voltage processors
Tohru Ishihara, Hiroto Yasuura
Abstract
Tohru Ishihara, Hiroto Yasuura
Abstract
This paper presents a model of dynamically variable voltage processor and basic theorems for power-delay optimization. A static voltage scheduling problem is also proposed and formulated as an integer linear programming (ILP) problem. In the problem, we assume that a core processor can vary its supply voltage dynamically, but can use only a single voltage level at a time. For a given application program and a dynamically variable voltage processor, a voltage scheduling which minimizes energy consumption under an execution time constraint can be found.
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This paper presents a model of dynamically variable voltage processor and basic theorems for power-delay optimization. A static voltage scheduling problem is also proposed and formulated as an integer linear programming (ILP) problem. In the problem, we assume that a core processor can vary its supply voltage dynamically, but can use only a single voltage level at a time. For a given application program and a dynamically variable voltage processor, a voltage scheduling which minimizes energy consumption under an execution time constraint can be found.
Key concepts: Computer science, Voltage, Parallel computing, Integer programming, Scheduling (production processes), Variable (mathematics), Multi-core processor, Linear programming