Low-output-impedance BiCMOS voltage buffer
Johan Bauwelinck, Wei Chen, Dieter Verhulst, Yves Martens, Peter Ossieur, Xing-Zhi Qiu, Jan Vandewege
Abstract
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Johan Bauwelinck, Wei Chen, Dieter Verhulst, Yves Martens, Peter Ossieur, Xing-Zhi Qiu, Jan Vandewege
Abstract
Open-access reader
A low power, 3.3V BiCMOS voltage buffer is presented showing gigahertz operation, low output impedance and low input current. The buffer is designed to make the voltage at an unused negative output of a current switching DAC equal to the voltage of the positive current output, thus increasing the switching speed of the DAC. By consequence the buffer has to sink a fast switching current. A super emitter follower is used for achieving the low output impedance whereas base current compensation is used to reduce the input current. Simulation results in a 0.35µm SiGe BiCMOS process are included demonstrating a low output impedance, a small input current, a high 3dB bandwidth and a good transient response at 330µW static dissipation.
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A low power, 3.3V BiCMOS voltage buffer is presented showing gigahertz operation, low output impedance and low input current. The buffer is designed to make the voltage at an unused negative output of a current switching DAC equal to the voltage of the positive current output, thus increasing the switching speed of the DAC. By consequence the buffer has to sink a fast switching current. A super emitter follower is used for achieving the low output impedance whereas base current compensation is used to reduce the input current. Simulation results in a 0.35µm SiGe BiCMOS process are included demonstrating a low output impedance, a small input current, a high 3dB bandwidth and a good transient response at 330µW static dissipation.
Key concepts: Buffer amplifier, Output impedance, BiCMOS, Electrical impedance, Voltage, Electrical engineering, High impedance, Negative impedance converter