1982•Unpublished venueRequires access

A Fault Simulator for MOS LSI Circuits

Ajoy K. Bose, P. Kozak, Chi-Yuan Lo, H. N. Nham, E. Pacas-Skewes, Kevin Wu

Abstract

This paper describes a fault simulator for MOS LSI circuits. The basic primitives for this simulator are MOS transistor structures where the transistors are evaluated logically. The simulator provides the capability of modeling and simulating both the classical input/output stuck-at faults and the non-classical transistor stuck-on and stuck-open faults.

About this research paper

What this paper is about

Why it matters

OpenAlex reports 32 citations for this work. Citation counts describe recorded attention and do not establish research quality.

Key contribution

A contribution statement is not available in the OpenAlex record.

Method / approach

Method details are not available in the OpenAlex metadata.

Main findings

Findings are not separately available in the OpenAlex metadata.

Limitations

Limitations are not available in the OpenAlex metadata.

Applications

Application details are not available in the OpenAlex metadata.

Available abstract

Key concepts: Fault Simulator, Transistor, Computer science, Electronic circuit, Electronic circuit simulation, Fault (geology), Logic simulation, Stuck-at fault