2014IEICE Electronics ExpressOpen access

A broadband 5-bit CMOS step attenuator in small area with low insertion loss

Yanlong Zhang, Yiqi Zhuang, Zhenrong Li, Xing Quan, Xiaojiao Ren

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Abstract

A broadband 5-bit CMOS step attenuator in small area with low insertion loss is presented in this paper, which is implemented with three independent attenuation modules and two compact T-type attenuation networks. Two of the independent modules are switched π-type, and the other is bridged-T type. The compact T-type attenuation networks share the series branches with the adjacent modules to decrease the chip area and insertion loss. The proposed attenuator has a maximum attenuation range of 0–31 dB with 1 dB-increase at the operational frequency range of 5–20 GHz and consumes a layout area cost of 0.44 mm2. The insertion loss is less than 8.7 dB. The RMS insertion amplitude and phase error are less than 0.45 dB and 5.7°, respectively.

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A broadband 5-bit CMOS step attenuator in small area with low insertion loss is presented in this paper, which is implemented with three independent attenuation modules and two compact T-type attenuation networks. Two of the independent modules are switched π-type, and the other is bridged-T type. The compact T-type attenuation networks share the series branches with the adjacent modules to decrease the chip area and insertion loss. The proposed attenuator has a maximum attenuation range of 0–31 dB with 1 dB-increase at the operational frequency range of 5–20 GHz and consumes a layout area cost of 0.44 mm2. The insertion loss is less than 8.7 dB. The RMS insertion amplitude and phase error are less than 0.45 dB and 5.7°, respectively.

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Available abstract

A broadband 5-bit CMOS step attenuator in small area with low insertion loss is presented in this paper, which is implemented with three independent attenuation modules and two compact T-type attenuation networks. Two of the independent modules are switched π-type, and the other is bridged-T type. The compact T-type attenuation networks share the series branches with the adjacent modules to decrease the chip area and insertion loss. The proposed attenuator has a maximum attenuation range of 0–31 dB with 1 dB-increase at the operational frequency range of 5–20 GHz and consumes a layout area cost of 0.44 mm2. The insertion loss is less than 8.7 dB. The RMS insertion amplitude and phase error are less than 0.45 dB and 5.7°, respectively.

Key concepts: Insertion loss, Attenuator (electronics), Attenuation, CMOS, Broadband, Materials science, Optical attenuator, Return loss

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