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Flip Chip Attach of Silicon and GaAs Fine Pitch Devices as well as Inner Lead TAB Attach Using Ball-bump Technology

J. Eldring, E. Zakel, H. Reichl

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Abstract

Ball-bumping is a flexible low cost bumping technology based on the conventional wire bonding procedure. It is applicable to single chips or whole wafers as well as to substrates. As established wire-bonding machines can be used, expensive bumping-process equipment for phototooling and plating is not necessary. Flip-chip bonding is the most advantageous attach method of high frequency applications. Compared with wire-bonding and TAB it allows the highest contact density, the shortest signal paths and lowest interconnection parasitics. The reduced pad sizes and pitches, not only of GaAs devices, demand a well controlled bump deformation during flip-chip bonding. This work develops process parameters for the flip-chip bonding of silicon and GaAs devices with respect to the best interconnection result by lowest bonding force and ball-bump deformation. Ball-bumps with diameters of 50 and 80 urn (2.0 and 3.2 mils) were created using 98% AuPd bump wire with diameters of 18 µm (0.7 mil) and 25 µm (1.0 mil) respectively. Ball-bumping with a minimal pitch of 70 µm (2.8 mils) has been achieved. A special preparation allowed the shear test investigation of each bump/pad interface after flip-chip attach. Bonding forces of 20 and 25 cN/bump respectively lead to a good welding in the bump/substrate interface due to the special shape of ball-bumps. For silicon devices which have a pad metallisation of aluminium, the shear forces of the bump/pad interface increase after flip-chip bonding, too. No cratering of GaAs and silicon occurs after flip-chip bonding due to a low bonding force ramp of 5 cN/s and 10 cN/s respectively. The flip-chip attach of a Fujitsu FLR 016 GaAs-FET which has pad sizes of 35 urn is demonstrated. In this case, substrate bumping is the more advantageous bumping method. The feasibility of fine-pitch TAB attach using ball-bumps is introduced. 100 µm (3.9 mils) pitch silicon devices with 328 pads were ball-bumped for both solder and thermal-compression TAB. Bond forces were in the range of 9–11 cN/bump and 15–21 cN/bump respectively. Pull forces of approximately 30 cN/lead show good results of the bump/lead interconnection after TAB.

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What this paper is about

Ball-bumping is a flexible low cost bumping technology based on the conventional wire bonding procedure. It is applicable to single chips or whole wafers as well as to substrates. As established wire-bonding machines can be used, expensive bumping-process equipment for phototooling and plating is not necessary. Flip-chip bonding is the most advantageous attach method of high frequency applications. Compared with wire-bonding and TAB it allows the highest contact density, the shortest signal paths and lowest interconnection parasitics. The reduced pad sizes and pitches, not only of GaAs devices, demand a well controlled bump deformation during flip-chip bonding. This work develops process parameters for the flip-chip bonding of silicon and GaAs devices with respect to the best interconnection result by lowest bonding force and ball-bump deformation. Ball-bumps with diameters of 50 and 80 urn (2.0 and 3.2 mils) were created using 98% AuPd bump wire with diameters of 18 µm (0.7 mil) and 25 µm (1.0 mil) respectively. Ball-bumping with a minimal pitch of 70 µm (2.8 mils) has been achieved. A special preparation allowed the shear test investigation of each bump/pad interface after flip-chip attach. Bonding forces of 20 and 25 cN/bump respectively lead to a good welding in the bump/substrate interface due to the special shape of ball-bumps. For silicon devices which have a pad metallisation of aluminium, the shear forces of the bump/pad interface increase after flip-chip bonding, too. No cratering of GaAs and silicon occurs after flip-chip bonding due to a low bonding force ramp of 5 cN/s and 10 cN/s respectively. The flip-chip attach of a Fujitsu FLR 016 GaAs-FET which has pad sizes of 35 urn is demonstrated. In this case, substrate bumping is the more advantageous bumping method. The feasibility of fine-pitch TAB attach using ball-bumps is introduced. 100 µm (3.9 mils) pitch silicon devices with 328 pads were ball-bumped for both solder and thermal-compression TAB. Bond forces were in the range of 9–11 cN/bump and 15–21 cN/bump respectively. Pull forces of approximately 30 cN/lead show good results of the bump/lead interconnection after TAB.

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Available abstract

Ball-bumping is a flexible low cost bumping technology based on the conventional wire bonding procedure. It is applicable to single chips or whole wafers as well as to substrates. As established wire-bonding machines can be used, expensive bumping-process equipment for phototooling and plating is not necessary. Flip-chip bonding is the most advantageous attach method of high frequency applications. Compared with wire-bonding and TAB it allows the highest contact density, the shortest signal paths and lowest interconnection parasitics. The reduced pad sizes and pitches, not only of GaAs devices, demand a well controlled bump deformation during flip-chip bonding. This work develops process parameters for the flip-chip bonding of silicon and GaAs devices with respect to the best interconnection result by lowest bonding force and ball-bump deformation. Ball-bumps with diameters of 50 and 80 urn (2.0 and 3.2 mils) were created using 98% AuPd bump wire with diameters of 18 µm (0.7 mil) and 25 µm (1.0 mil) respectively. Ball-bumping with a minimal pitch of 70 µm (2.8 mils) has been achieved. A special preparation allowed the shear test investigation of each bump/pad interface after flip-chip attach. Bonding forces of 20 and 25 cN/bump respectively lead to a good welding in the bump/substrate interface due to the special shape of ball-bumps. For silicon devices which have a pad metallisation of aluminium, the shear forces of the bump/pad interface increase after flip-chip bonding, too. No cratering of GaAs and silicon occurs after flip-chip bonding due to a low bonding force ramp of 5 cN/s and 10 cN/s respectively. The flip-chip attach of a Fujitsu FLR 016 GaAs-FET which has pad sizes of 35 urn is demonstrated. In this case, substrate bumping is the more advantageous bumping method. The feasibility of fine-pitch TAB attach using ball-bumps is introduced. 100 µm (3.9 mils) pitch silicon devices with 328 pads were ball-bumped for both solder and thermal-compression TAB. Bond forces were in the range of 9–11 cN/bump and 15–21 cN/bump respectively. Pull forces of approximately 30 cN/lead show good results of the bump/lead interconnection after TAB.

Key concepts: Bumping, Flip chip, Wire bonding, Interconnection, Materials science, Wafer bonding, Ball (mathematics), Silicon

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