Ming‐C. Cheng, C. Toumazou
Abstract
An MOS current conveyor design suitable for VLSI implementation is described. It uses a new circuit architecture which allows for low supply voltage operation at 3V enhancing its application versatility as a standard cell in VLSI analogue IC design as well as in mixed-mode IC design.
OpenAlex reports 75 citations for this work. Citation counts describe recorded attention and do not establish research quality.
A contribution statement is not available in the OpenAlex record.
Method details are not available in the OpenAlex metadata.
Findings are not separately available in the OpenAlex metadata.
Limitations are not available in the OpenAlex metadata.
Application details are not available in the OpenAlex metadata.
An MOS current conveyor design suitable for VLSI implementation is described. It uses a new circuit architecture which allows for low supply voltage operation at 3V enhancing its application versatility as a standard cell in VLSI analogue IC design as well as in mixed-mode IC design.
Key concepts: Very-large-scale integration, Current conveyor, Electronic engineering, Circuit design, Electrical engineering, Computer science, Engineering, Voltage