2014•Unpublished venueRequires access
Newly developed ultra thin fan-out wafer level package for PoP usage
H. Shimamoto, Kenichi Soga, K. Takemra, Hirotaka Yanagisawa, S. Asai, K. Kondo, M. Sugo, H. Kato, Youichi Matsuda
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Abstract
The limitation of the package height in the smartphone becomes severer and severer. Especially in the case of application processer, TSV structure is necessary to clear 1mm package height that is stacked by 2-4 DRAMs inside. But not only the cost of fabricating Through Si Via (TSV) on the Si device is expensive, also handling of the thin chip is fragile. To solve these problems, we have developed ultra thin fan-out type wafer level package (UT-FOWLP) whose thickness is less than 100um. Using this WLP as Package-on-Package (PoP) stacked on System on a Chip (SOC), the total package height of application processor becomes thinner.